Download Programmes Calendar - 2017  | Applications open for "Certificate Programmes 6 Months( Full-time )" till 18th September 2017   |  Registrations open for Faculty Development Programmes

Faculty Development Programme On “FPGA Based System Design”

Dates

Batch II: 19th – 24th June 2017

Duration

6 days

Eligibility

Any Faculty in Engineering/ Technology related to Electronics, Communication, Information Technology, Computer Science, Instrumentation, Embedded Systems, VLSI Design, Electrical Engineering and any other related disciplines

Training In

Each Participant will be given hands-on training on:

  • FPGA architecture and design flow
  • FPGA based system design
  • VHDL synthesis and simulation
  • SOC Design based on FPGA
  • RTL synthesis
  • Design of FPGA architecture
  • Reconfigurable Computing

Training Outcome

Participants will take their working model and FPGA board with them after the successful completion of the training for further experiments and research along with their Mini-laboratory

Participants will be certified after successful completion of the workshop

Mini-laboratory

Each participant will be provided with a mini-laboratory which contains all the necessary electronic hardware, software, FPGA board and tools required during the workshop. This mini-laboratory would be property of the participants

Experts

Prof. Bhushan Patil
Prof. Amit Patwardhan
Prof. Rabinder Henry
Prof. Sreedhar Patha
Prof. Yashodhan Mandke
Prof. Jayant Pawar

Fees

25,000 INR*
(Includes accommodation, food and mini-laboratory)

Number of seats per batch: 20

Interested faculty can register online at www.ppcrc.in

Bank Details

Beneficiary Name : International Institute of Information Technology
Bank Account Number : 00072000006708
Name of the Bank : HDFC Bank Ltd
Branch : Bhandarkar Road
IFSC Code : HDFC0000007

* Inclusive of Tax